363 Verification Engineer jobs in Malaysia
Design Verification Engineer
Posted 10 days ago
Job Viewed
Job Description
Overview
Senior Talent Acquisition Specialist at UST Global
- Will be part of a team that handles Verification for complex IPs and closes the Verification to challenging milestones.
- IP Verification: VR creation as per the chip requirements and UVM/OVM Test benches creation.
- Support in building verification infrastructure at the chip level as per the requirements.
- Capable of handling multiple areas of IP Verification: RTL, Power Aware and Gate Level Verification.
- Working with the team and functional leads; some interaction with cross functional groups.
- Experience in digital IP verification with SV/UVM/Formal Verification or newer industry methodologies.
- Good understanding of ASIC verification concepts and techniques and Verilog/SystemVerilog and UVM.
- Proficiency in scripting languages such as Perl or Python is a plus; some database experience for IP technical information maintenance is also a plus.
- Over 4 years’ experience focusing on SV assertion/coverage/formal verification is a plus.
- Bachelor’s degree or higher in Electrical and Electronics Engineering or a related field.
- Associate
- Full-time
- Design
- Semiconductor Manufacturing
Design Verification Engineer
Posted 19 days ago
Job Viewed
Job Description
(Multiple headcounts available in different specializations)
- UVM & SV
Job Responsibilities:
- Be part of a team verifying complex IPs and driving them to closure against challenging milestones.
- Build verification environments and UVM/OVM testbenches based on chip requirements.
- Work across RTL, power-aware, and gate-level verification.
What we’re looking for:
- Bachelor’s degree (or higher) in Electrical/Electronic Engineering or related.
- 3–4+ years of hands‑on experience in digital IP verification using SV/UVM or similar methodologies.
- Solid knowledge of ASIC verification concepts.
- Bonus if you’ve dabbled in scripting (Perl/Python) or have database know‑how.
- Willing to relocate and work in Penang, Malaysia
- Seniority level Mid-Senior level
- Employment type Full-time
- Industries IT Services and IT Consulting
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Physical Verification Design Methodology and Automation Engineer SOC/FPGA Silicon Design Verification Engineer SOC/FPGA Silicon Design Verification Engineer FPGA Pre Silicon Design Verification Engineer Digital IC Design Engineer in Penang, Malaysia High Energy Efficiency Chip Verification EngineerWe’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
#J-18808-LjbffrHardware Verification Engineer
Posted 9 days ago
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Hardware Verification Engineer
Posted 8 days ago
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Kuala Lumpurtime type:
Full timeposted on:
Posted Todayjob requisition id:
R- Change people’s lives and love what you do! Cochlear develops world-leading medical devices that help people hear. As a top 100 medical device company and market-leader in implantable hearing devices, more people choose a Cochlear-branded cochlear implant system than any other. Our employees tell us that the number one reason they enjoy working for Cochlear is the opportunity to make a difference to people’s lives.Cochlear’s mission is to help people hear and be heard. As the global leader in implantable hearing solutions, Cochlear is dedicated to helping people with moderate to profound hearing loss experience a life full of hearing. We aim to give people the best lifelong hearing experience and access to innovative future technologies. We collaborate with the industry’s best clinical, research and support networks. That’s why more people choose Cochlear than any other hearing implant company. Learn and grow with us as we tackle the most complex challenges in helping more people to hear and experience life’s opportunities.**The Opportunity**Cochlear has an opportunity for a **Hardware Verification Engineer (Electrical)** to join the Implant and Sound Processors Development team. The successful candidate will be responsible to plan, organize, execute and document Verification & Validation (V&V) tasks to support the product development of Cochlear products. Coupled with maintaining the compliance of products to international standards and regulations.The incumbent will be required to work closely with global and local (CMY) teams to ensure requirements, standards, safety and reliability of Cochlear products are met.**Key Responsibilities*** Plan verification activities and work closely with the design engineers to understand verification priorities and timelines.* Follow all relevant procedures and protocols as well as planning on the execution of the verification and write reports when needed.* Collaborating with the design engineers to develop test methods, design test equipment, write test plans & protocols as well as to debug problems encountered during testing.* Update and improve protocols based on learnings in ensuring all verification results are appropriately recorded.* Be actively involved in moderately complex investigations, evaluate alternatives and recommend solutions.* Prepare, review and perform reliability as well as sustaining engineering activities & reports.* Perform general engineering tasks needed to sustain Cochlear’s approved products on the market, including engineering evaluations (e.g. fit up checks) and First Off Inspections (FOAs).* Co-ordinate activities with other teams as needed (e.g. procurement, quality, regulatory, process engineering and manufacturing).* Work with design authorities and design engineers (where necessary) to perform investigations and develop solutions.* Update technical documentation including design descriptions and risk management files.* Raise Change Requests as needed to update documents under change control & manage the process to completion.**Essential Requirements:*** Completed minimum Bachelor’s in Electrical, Microelectronics, Mechatronics Engineering or equivalent.* Minimum of 1-3 years of experience in product hardware verification within consumer products, medical devices, computer hardware, semiconductors, automotive, defence industry or other regulated industry with exposure working with MNC (multi-national corporation) organization.* Excellent communication skills in both written and spoken English.* Knowledge and understanding of electronics and electronic test equipment (e.g. Multimeters, Oscilloscopes, Temperature Chamber Ovens, soldering, lab power supplies, source meter units (SMU), function generators etc).* Knowledge of testing (e.g. EMC, Radio Frequency (RF) link etc).* Knowledge of scripting language, e.g. Python with intermediate proficiency would be highly desirable.* Strong interest in medical device development or safety-critical applications and associated quality regulations.* Experience with test set-up, executing test protocols, complete test inspection and correctly interpret the results.* Experience using collaborative software tools e.g. JIRA, Confluence, Windchill or equivalent is highly desirable.* Awareness of Verification & Validation principles and standards.* Strong time management skills and ability to work autonomously.* Good project and stakeholder management skills.* Proficient in Microsoft Office and other relevant software programs.We want Cochlear to be a place where our people truly enjoy coming to work. Through our internal programs and employee benefits, we aim to create an environment where our people will feel value and supported. Whether your focus is on continuous learning, professional development or simply finding an environment which enables you to thrive whilst balancing family or personal life commitments, then we have several programs in place to support you. Click **“Apply”** if you are keen to grow with us!Cochlear Malaysia provides shared services to support Cochlear’s global operations. The growing team of professionals in Malaysia provides critical support in areas such as IT infrastructure and applications, development and testing, business intelligence development and support, procurement, customer service, service and repairs and returned device analysis engineering.If you feel that you have the skills and experience to be successful in this role and take on new challenges to build your career with Cochlear, please start your application by clicking the apply button below.#CochlearCareers()(blob: / 1:36 #J-18808-Ljbffr
Design Verification Engineer
Posted 9 days ago
Job Viewed
Job Description
Senior Talent Acquisition Specialist at UST Global
Will be part of a team that handles Verification for complex IPs and closes the Verification to challenging milestones.
IP Verification: VR creation as per the chip requirements and UVM/OVM Test benches creation.
Support in building verification infrastructure at the chip level as per the requirements.
Capable of handling multiple areas of IP Verification: RTL, Power Aware and Gate Level Verification.
Working with the team and functional leads; some interaction with cross functional groups.
Job Requirements
Experience in digital IP verification with SV/UVM/Formal Verification or newer industry methodologies.
Good understanding of ASIC verification concepts and techniques and Verilog/SystemVerilog and UVM.
Proficiency in scripting languages such as Perl or Python is a plus; some database experience for IP technical information maintenance is also a plus.
Over 4 years’ experience focusing on SV assertion/coverage/formal verification is a plus.
Bachelor’s degree or higher in Electrical and Electronics Engineering or a related field.
Seniority level
Associate
Employment type
Full-time
Job function
Design
Industries
Semiconductor Manufacturing
#J-18808-Ljbffr
Design Verification Engineer
Posted 18 days ago
Job Viewed
Job Description
(Multiple headcounts available in different specializations) UVM & SV Job Responsibilities: Be part of a team verifying complex IPs and driving them to closure against challenging milestones. Build verification environments and UVM/OVM testbenches based on chip requirements. Work across RTL, power-aware, and gate-level verification. What we’re looking for: Bachelor’s degree (or higher) in Electrical/Electronic Engineering or related. 3–4+ years
of hands‑on experience in digital IP verification using SV/UVM or similar methodologies. Solid knowledge of ASIC verification concepts. Bonus if you’ve dabbled in scripting (Perl/Python) or have database know‑how. Willing to relocate and work in Penang, Malaysia Seniority level
Seniority level Mid-Senior level Employment type
Employment type Full-time Job function
Industries IT Services and IT Consulting Referrals increase your chances of interviewing at UST by 2x Get notified about new Design Verification Engineer jobs in
Bayan Lepas, Penang, Malaysia . Physical Verification Design Methodology and Automation Engineer
SOC/FPGA Silicon Design Verification Engineer
SOC/FPGA Silicon Design Verification Engineer
FPGA Pre Silicon Design Verification Engineer
Digital IC Design Engineer in Penang, Malaysia
High Energy Efficiency Chip Verification Engineer
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Senior Design Verification Engineer
Posted 10 days ago
Job Viewed
Job Description
Who we are:
At UST, we help the world’s best organizations grow and succeed through transformation. Bringing together the right talent, tools, and ideas, we work with our client to co-create lasting change. Together, with over 30,000 employees in 25 countries, we build for boundless impact—touching billions of lives in the process. Visit us at
OverviewWe are seeking a skilled and experienced Design Verification Engineer to join our dynamic team in Penang, Malaysia. The ideal candidate will play a pivotal role in ensuring the functional correctness, power efficiency, and protocol compliance of our cutting-edge semiconductor designs. This position is suited for individuals with a strong technical background in advanced verification methodologies and protocols.
Experience: 4+ years
Responsibilities- Develop and implement constrained-random verification environments using SystemVerilog and UVM .
- Write and execute test plans , testcases , scoreboards , monitors , and coverage models.
- Debug and analyze test failures to identify RTL or testbench issues.
- Collaborate closely with RTL designers, architecture, and firmware teams to ensure design correctness and coverage closure.
- Develop reusable verification components and contribute to the improvement of the verification infrastructure and methodology.
- Analyze functional and code coverage metrics; drive coverage closure.
- Participate in design and verification reviews and provide feedback on specifications and testability.
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
- 4+ years of experience in ASIC/SoC verification using SystemVerilog and UVM.
- Strong understanding of digital design and verification fundamentals.
- Experience with simulation tools (e.g., VCS, Questa, Incisive) and waveform viewers (DVE, Verdi).
- Proficiency in scripting languages (e.g., Python, Perl, Shell, TCL) for automation.
- Strong debugging and problem-solving skills.
- Experience with version control systems (Git, Perforce) and bug tracking tools.
Ms. Anna – WhatsApp:
Email:
Seniority level- Mid-Senior level
- Full-time
- Engineering Services and Semiconductor Manufacturing
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Senior Systems Verification Engineer
Posted 10 days ago
Job Viewed
Job Description
About Dyson
At Dyson, we challenge convention, break boundaries, and engineer products that redefine industries. Our obsession with solving real-world problems drives us to develop cutting-edge technology that delivers uncompromised performance and reliability.
About The RoleAs a Senior System Verification Engineer, you’ll be at the heart of Dyson’s innovation, ensuring our next-generation electronics meet the highest quality standards. This role offers an exciting opportunity to work on complex, high-performance systems, leveraging automation, data analytics, and advanced testing methodologies to shape the future of Dyson’s technology.
Key Responsibilities- Own the System Verification Process: Define and execute test strategies for complex electronic systems to ensure Dyson’s products exceed performance expectations.
- Develop Next-Gen Automated Test Solutions: Design and implement scalable, automated verification platforms using LabVIEW, TestStand, and National Instruments DAQ.
- Collaborate Across Disciplines: Work alongside electronics, firmware, and product teams to define testable requirements and optimize verification processes.
- Data-Driven Validation: Utilize real-time analytics, sensor data, and AI-driven insights to enhance test efficiency and product reliability.
- Innovate & Push Boundaries: Experiment with emerging technologies, improve test methodologies, and contribute to Dyson’s relentless pursuit of engineering excellence.
- Ensure Product Integrity: Conduct manual and automated electronic measurements, troubleshoot system-level issues, and drive product improvements.
- A degree in Electronics, Electrical, or Systems Engineering, or equivalent hands-on experience.
- Expertise in LabVIEW, TestStand, or similar automated test development tools.
- Familiarity with National Instruments DAQ, Arduino, or Raspberry Pi (a plus).
- Proven track record in system verification, automated testing, and test equipment design.
- Strong analytical and problem-solving skills with the ability to interpret complex test data and drive solutions.
- Collaborative mindset with excellent communication skills to work across multidisciplinary teams.
- Passion for continuous learning and pushing technology to its limits.
Dyson Singapore monitors the market to ensure competitive salaries and bonuses. Beyond that, you’ll enjoy a transport allowance and comprehensive medical care and insurance. But financial benefits are just the start of a Dyson career. Professional growth, leadership development and new opportunities abound, driven by regular reviews and dynamic workshops. And with a vibrant culture, the latest devices and a relaxed dress code reflecting our engineering spirit, it’s an exciting team environment geared to fuelling and realising ambition.
Dyson is an equal opportunity employer. We know that great minds don’t think alike, and it takes all kinds of minds to make our technology so unique. We welcome applications from all backgrounds and employment decisions are made without regard to race, colour, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, protected veteran status or other any other dimension of diversity.
Seniority level- Mid-Senior level
- Full-time
- Quality Assurance
- Appliances, Electrical, and Electronics Manufacturing
Senior Design Verification Engineer
Posted 13 days ago
Job Viewed
Job Description
Talent Acquisition @ UST | Talent Sourcing, Recruitment Strategies
Responsibilities- Will be part of a team that handles Verification for complex IP’s and close the Verification to the challenging milestones.
- IP Verification: VR creation as per the chip requirements and UVM/OVM Test benches creation
- Support in building verification infrastructure at the chip level as per the requirements
- Capable of handling multiple areas of IP Verification: RTL, Power Aware and Gate Level Verification
- Working with the team and functional leads; Some interaction with cross functional groups
- Have experience of digital IP verification with SV/UVM/Formal Verification or new methodology of the industry
- Good understanding of ASIC verification concepts and techniques and Verilog/System Verilog and UVM
- It’s a plus to be good at some script language, such as Perl, python. Or some database experience (for IP technical info maintain).
- It’s also a plus if have over 2 years’ experience focusing on SV assertion/coverage/formal verification.
- Bachelor’s degree or higher in Electrical and Electronics Engineering or related field
- 4-6 years of relevant experience
- Seniority level: Mid-Senior level
- Employment type: Full-time
- Industries: Semiconductor Manufacturing
Location: Penang, Malaysia
#J-18808-LjbffrSenior Design Verification Engineer
Posted 10 days ago
Job Viewed
Job Description
We are seeking a skilled and experienced Design Verification Engineer to join our dynamic team in Penang, Malaysia. The ideal candidate will play a pivotal role in ensuring the functional correctness, power efficiency, and protocol compliance of our cutting-edge semiconductor designs. This position is suited for individuals with a strong technical background in advanced verification methodologies and protocols. Experience:
4+ years Responsibilities
Develop and implement constrained-random verification environments using
SystemVerilog
and
UVM . Write and execute
test plans ,
testcases ,
scoreboards ,
monitors , and
coverage
models. Debug and analyze test failures to identify RTL or testbench issues. Collaborate closely with RTL designers, architecture, and firmware teams to ensure design correctness and coverage closure. Develop reusable verification components and contribute to the improvement of the verification infrastructure and methodology. Analyze functional and code coverage metrics; drive coverage closure. Participate in design and verification reviews and provide feedback on specifications and testability. Required Qualifications
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field. 4+ years of experience in ASIC/SoC verification using SystemVerilog and UVM. Strong understanding of digital design and verification fundamentals. Experience with simulation tools (e.g., VCS, Questa, Incisive) and waveform viewers (DVE, Verdi). Proficiency in scripting languages (e.g., Python, Perl, Shell, TCL) for automation. Strong debugging and problem-solving skills. Experience with version control systems (Git, Perforce) and bug tracking tools. Contact
Ms. Anna – WhatsApp: Email: Seniority level
Mid-Senior level Employment type
Full-time Job function
Engineering Services and Semiconductor Manufacturing Referrals increase your chances of interviewing at UST Malaysia. We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
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