184 Validation Engineer jobs in Malaysia

We are looking for a Validation Engineer to support a range of qualification and validation activities across critical equipment and controlled environments. This role involves the execution of temperature mapping, equipment validation, protocol development, and performance verification to ensure compliance with regulatory standards and internal quality systems.

Key Responsibilities:

• Temperature Mapping & Environmental Qualification:
• Conduct thermal mapping studies for Cold Rooms (2°C to 8°C), Freezers, and Incubators using Kaye AVS (Advanced Validation System).
• Prepare and execute IOPQ protocols, perform data analysis, and compile comprehensive validation summary reports.

Autoclave Validation:

• Manage requalification of site autoclaves and qualification of new units, ensuring alignment with cGMP standards.
• Support introduction of new loads such as towel packs and perform specialized tests like the Air Detector Test.
• Develop and execute SOPs, OPQ protocols, and performance verification plans for all validated loads.

Equipment Validation:

• Validate and qualify Kaye Validator AVS systems through IOQ protocol development, execution, and reporting.
• Support calibration and maintenance of validation instrumentation and document performance accordingly.

Airflow Visualization Studies:

• Perform smoke studies (air visualization) for biosafety cabinets (BSCs), cleanroom zones, and equipment doors in compliance with cleanroom standards.
• Execute protocols and prepare clear and accurate documentation including study reports.

Documentation & Compliance:

• Draft validation documentation including protocols, deviation reports, and final summary reports.
• Identify and resolve discrepancies in validation findings, escalating issues as needed.
• Prepare and maintain validation maintenance reports for facility and equipment (F&E).

Requirements:

• Bachelor’s Degree or Diploma in Engineering, Life Sciences, or a related technical discipline.
• Solid experience in equipment qualification, environmental validation, and temperature mapping using Kaye AVS.
• Knowledge of regulatory standards including cGMP, GDP, and GxP.
• Strong understanding of validation lifecycle: IQ, OQ, PQ, and requalification.
• Excellent technical writing, data analysis, and problem-solving skills.
• Ability to work independently and collaboratively across functional teams.

Preferred Qualifications:

• Previous experience in pharmaceutical, biotechnology, or regulated manufacturing environments.
• Familiarity with cleanroom validation and environmental monitoring standards.

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We are looking for a Validation Engineer to support a range of qualification and validation activities across critical equipment and controlled environments. This role involves the execution of temperature mapping, equipment validation, protocol development, and performance verification to ensure compliance with regulatory standards and internal quality systems. Key Responsibilities: Temperature Mapping & Environmental Qualification: Conduct thermal mapping studies for Cold Rooms (2°C to 8°C), Freezers, and Incubators using Kaye AVS (Advanced Validation System). Prepare and execute IOPQ protocols, perform data analysis, and compile comprehensive validation summary reports. Autoclave Validation: Manage requalification of site autoclaves and qualification of new units, ensuring alignment with cGMP standards. Support introduction of new loads such as towel packs and perform specialized tests like the Air Detector Test. Develop and execute SOPs, OPQ protocols, and performance verification plans for all validated loads. Equipment Validation: Validate and qualify Kaye Validator AVS systems through IOQ protocol development, execution, and reporting. Support calibration and maintenance of validation instrumentation and document performance accordingly. Airflow Visualization Studies: Perform smoke studies (air visualization) for biosafety cabinets (BSCs), cleanroom zones, and equipment doors in compliance with cleanroom standards. Execute protocols and prepare clear and accurate documentation including study reports. Documentation & Compliance: Draft validation documentation including protocols, deviation reports, and final summary reports. Identify and resolve discrepancies in validation findings, escalating issues as needed. Prepare and maintain validation maintenance reports for facility and equipment (F&E). Requirements: Bachelor’s Degree or Diploma in Engineering, Life Sciences, or a related technical discipline. Solid experience in equipment qualification, environmental validation, and temperature mapping using Kaye AVS. Knowledge of regulatory standards including cGMP, GDP, and GxP. Strong understanding of validation lifecycle: IQ, OQ, PQ, and requalification. Excellent technical writing, data analysis, and problem-solving skills. Ability to work independently and collaboratively across functional teams. Preferred Qualifications: Previous experience in pharmaceutical, biotechnology, or regulated manufacturing environments. Familiarity with cleanroom validation and environmental monitoring standards.

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The Opportunity Esco Lifesciences Group is Singapore’s most globalized life sciences company, with annual revenues close to SGD 200M and global operations in over 42 locations and 26 direct countries across North America, Europe, Asia, Oceania. Esco Aster Pte Ltd is an affiliate of Esco Lifesciences Group and was first incorporated in 2017. Esco Aster is a contract research development and manufacturing organization founded and deeply rooted by scientists enabling fellow scientists to translate their bench work into commercially available products at affordable prices. Our scientific work is in emerging and frontier biology utilizing cells as a final product or deriving products from cells which often we use cells as the factory to derive our target product. Our first commercial breakthrough success is Esco Aster is commercially first in class being first in the world to be certified for cultivated/cell-based meat to FSSC 22000 and by a competent food regulatory body. We are first in the region to operate an end-to-end integrated full cell line creation/immortalization or engineered cell line, cell culture process development, analytical development for stem cells and exosomes with full cGMP Capabilities from Drug Substance and small-scale fill & finish for final Cell Therapy Product. The work we do creates a remarkable and lasting impact on our world. We offer you an opportunity to be part of this exciting journey to own your career and firsthand exposure to new emerging modalities supporting translational sciences. The Scope You will be part of Esco Aster's MSAT team and contribute to the overall site mission and objectives. You will ensure Commissioning Qualification and Validation (CQV) activities and tasks are planned and executed in an efficient and compliant manner, while adhering to GxP standards. You will work with the Leadership team of MSAT to develop a continuous improvement mindset and engage in teamwork with cross-functional departments. Primary work location: Ayer Rajah Crescent, Singapore Job Responsibilities · Perform risk-based commissioning, qualification and validation of pharmaceutical and biopharmaceutical equipment, utilities, facilities and processes. · Develop validation protocols and reports that fulfil regulatory requirements and industry best practices. · Assist in developing User Requirements Specification documents. · Prepare design review and design qualification documents at the initial design stage to align with specifications. · Generate protocols and execute field work related to Commissioning (FAT, SAT), Installation & Operational Qualification (IOQ). · Prepare and execute FMEA and validation activities pertaining to Performance Qualification (PQ), Computerized System Validation (CSV), Cleaning Validation, Thermal Validation and Transport Qualification, as required. · Complete assigned CQV tasks according to planned schedule, budget, safety and engineering standards. · Coordinate with internal teams (manufacturing, engineering, quality etc.) to achieve CQV objectives. · Coordinate and manage external parties, primarily vendors and contractors to achieve CQV objectives. · Investigate deviations and write deviation reports and findings. · Support Engineering and Facilities functions as needed. · Undertake tasks assigned by leaders as and when appropriate. Requirements · Degree and/or Diploma in Engineering/Science or related studies. · Minimum of 3-5 years’ experience in pharmaceutical/biopharmaceutical manufacturing facility. · Familiar with working in a GxP environment and keeping up to date with current GxP, with flexibility to change as needed due to new regulatory requirements and technologies, as relevant for clinical and commercial supply. · Good knowledge of GxP, GDP, CQV approaches including Validation Lifecycle approach (URS, DQ, FAT/SAT, IOQ, CSV, Cleaning/ Thermal Validation etc.), regulatory requirements and best industry practices. · Competent in technical writing and presentations. · Proficient in MS Office Suite (Microsoft Word, PowerPoint, Excel). · Able to work independently, self-starter, self-motivated and task oriented. · Good communication skills and able to openly communicate and escalate any relevant issues. · Strong team player to work with both internal and external stakeholders. · Develop positive relationship with a strong set of interpersonal skills. · Prepared to travel and reside abroad to ensure the successful execution of external projects, if required. Interested candidates, please submit a Cover Letter and CV to

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We are looking for a dynamic, energetic Systems Validation Engineer to join our growing team. To work on the development of methodologies, the execution of system integration/System plans, and debugging of failures. As a key contributor you will collaborate with Architecture, Design, and Pre-silicon integration teams to improve post-silicon test content and provide feedback for future debug and test features. You will use and apply platform level tools and techniques to ensure Silicon quality.

THE Person:

As a Systems Validation Engineer, you will deliver our next generation of system validation tests for our products. In this high visibility position, your systems engineering expertise will be necessary to find and resolve silicon platform issues.

KEY RESPONSIBILITIES:

• Work with global teams closely to define test strategy, work out smart system validation plan on post silicon level and fast response on issue debug.
• Collaborate with function teams and drive the work end to end from planning, execution, issue debug.
• Deliver professional project report to management, highlight risk in time with solution plans.
• Make improvements to system level integration/System level test strategies, methodologies, and processes.
• Collaboration with multi-functional hardware and software teams to debug and tackle complex issues.
• Develop and improve automation features according to requirements.

PREFERRED EXPERIENCE:

• Strong PC technology background and familiar with x86 system, APU/CPU/GPU products, system features, power management, etc.
• Strong technical knowledge for variant type of System Level Validation (Unit level, Integrity Level and System Level)
• Excellent communication skills, demonstrated success in working across geographies and cross functional teams
• Familiar with Windows and Linux environment.
• Script or coding (Python, C, Perl, Ruby) capability is a strong plus, automation and validation farm experience is a strong plus.

ACADEMIC CREDENTIALS:

• A B.Sc. Or Master’s Degree in Electrical/Computer Engineering.
• 3+ years’ experience of validation, debug in related industry.
• Self-motivated and able to work independently and effectively to meet time.

Seniority level

• Seniority level Mid-Senior level

Employment type

• Employment type Full-time

Job function

• Industries Engineering Services and IT Services and IT Consulting

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Security Systems IP Validation Staff Engineer Data Warehouse/Business Intelligence Developer High Energy Efficiency Chip Verification Engineer Associate III - Semiconductor Product Validation Embedded Firmware Engineer (Zephyr RTOS) Expression of Interest : Jobs for Computer Science, IT and Software Engineering Graduates Graduate Technical Program (GTP) - Data Engineer

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We are hiring a highly dedicated Quality Validation Engineer who will manage specification, process validation, test method validation, stability study, and transportation study in our Medical Device/Pharmaceutical sector.

Key Responsibilities:

1. Manage validation procedures (including equipment, process & test method) and validation master list.
2. Establish validation documents and carry out validation activities, including performance qualification and test method validation.
3. Conduct periodic validation reviews (PVR) in a timely manner and perform revalidation when required.
4. Generate stability study documents and execute stability studies as requested by customers.
5. Administer test equipment (such as tensile testers, smart scopes, etc.) and ensure proper operation according to requirements.
6. Manage customer change requests (including documentation, QAD updates, etc.).
7. Revise raw material/product specifications when necessary.
8. Identify and initiate improvement activities through data analysis from manufacturing records, such as capability studies and risk analyses.
9. Lead/support non-conformance investigations, including risk assessment, root cause analysis, and implementing corrective & preventive actions.
10. Establish and execute stability and transportation study documents as per customer requirements.
11. Support internal, supplier, and external audit processes.
12. Stay updated with new technology and maintain in-depth knowledge of products/raw materials to support new product introductions or improvements.
13. Comply with all SOPs, work instructions, and guidelines that have been trained on.
14. Perform other duties as assigned by superiors and complete tasks within the specified time frame.

Key Requirements:

1. Degree in Science, Chemistry, Engineering, or equivalent.
2. Minimum of 3 years’ relevant experience, preferably in the Medical Device industry.
3. Good knowledge of ISO 13485, GMP, and FDA 21 CFR Part.
4. Experience working in a cleanroom environment.
5. Ability to work independently and in a team.
6. Strong interpersonal, analytical, and problem-solving skills.
7. Proactive, resourceful, and capable of multitasking.
8. Proficient in English and Bahasa Melayu, both written and verbal.

Join us in our mission to make a positive impact on healthcare through innovation and excellence in manufacturing. If you are a motivated professional with a passion for this field and a desire to thrive in a dynamic environment, we want to hear from you!

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2 days ago Be among the first 25 applicants

Direct message the job poster from UST Malaysia

Hiring Top Semiconductor Engineers across APAC Region and Vietnam | Connecting Talents to Opportunities | Talents Strategist | Follow me for more Job…

Who we are:

At UST, we help the world’s best organizations grow and succeed through transformation. Bringing together the right talent, tools, and ideas, we work with our client to co-create lasting change. Together, with over 30,000 employees in 25 countries, we build for boundless impact—touching billions of lives in the process. Visit us at

W e are looking to fill a Senior FPGA Engineer who has worked on:

Experience: 4+ years of experience

The Role : Candidate will be responsible for FPGA implementation and create comprehensive functional test plans for the interface validation of IO controllers. The candidate will execute functional test plans of IP using FPGA hardware & software validation tools, oscilloscopes, & logic analyzers.

The Person : Requires good written and oral communication skills with a Demonstrated ability to communicate with a variety of engineering disciplines and management.

Responsibilities :

• Perform FPGA hardware testing
• Pre silicon validation via FPGA for emulating the targeted IP sub-system
• Post silicon validation, lab bring up and debug of the targeted IP sub-system
• Root cause analysis and resolving issues encountered either in pre-silicon or post silicon targeted IP sub-system

Preferred Experience & Skill Set:

• Requires experience and demonstrated technical expertise in the development & execution of platform level functional test plans. Platform level experience with high speed I/O interfaces
• Experienced in FPGA development, Synthesis with logical & physical constraints, Timing closure and Place and Route in FPGA
• Requires experience and demonstrated technical expertise in the domain of High speed I/O interfaces of computer system.
• Requires good written and oral communication skills; Demonstrate the ability to communicate with a variety of engineering disciplines and management.
• Familiarity with Xilinx reference platforms such as Zynq reference board etc

EDUCATION: B. S. in Electrical Engineering or Computer Engineering

Contact Ms. Anna - WhatsApp: +84935059669

Email:

Seniority level

• Seniority level Mid-Senior level

Employment type

• Employment type Full-time

Job function

• Industries Engineering Services and Semiconductor Manufacturing

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2 days ago Be among the first 25 applicants Direct message the job poster from UST Malaysia Hiring Top Semiconductor Engineers across APAC Region and Vietnam | Connecting Talents to Opportunities | Talents Strategist | Follow me for more Job…

Who we are: At UST, we help the world’s best organizations grow and succeed through transformation. Bringing together the right talent, tools, and ideas, we work with our client to co-create lasting change. Together, with over 30,000 employees in 25 countries, we build for boundless impact—touching billions of lives in the process. Visit us at

W e are looking to fill a Senior FPGA

Engineer

who has worked on: Experience: 4+ years of experience The Role :

Candidate will be responsible for FPGA implementation and create comprehensive functional test plans for the interface validation of IO controllers. The candidate will execute functional test plans of IP using FPGA hardware & software validation tools, oscilloscopes, & logic analyzers. The Person

: Requires good written and oral communication skills with a Demonstrated ability to communicate with a variety of engineering disciplines and management. Responsibilities : Perform FPGA hardware testing Pre silicon validation via FPGA for emulating the targeted IP sub-system Post silicon validation, lab bring up and debug of the targeted IP sub-system Root cause analysis and resolving issues encountered either in pre-silicon or post silicon targeted IP sub-system Preferred Experience & Skill Set: Requires experience and demonstrated technical expertise in the development & execution of platform level functional test plans. Platform level experience with high speed I/O interfaces Experienced in FPGA development, Synthesis with logical & physical constraints, Timing closure and Place and Route in FPGA Requires experience and demonstrated technical expertise in the domain of High speed I/O interfaces of computer system. Requires good written and oral communication skills; Demonstrate the ability to communicate with a variety of engineering disciplines and management. Familiarity with Xilinx reference platforms such as Zynq reference board etc EDUCATION: B. S. in Electrical Engineering or Computer Engineering Contact

Ms. Anna - WhatsApp: +84935059669 Email: Seniority level

Seniority level Mid-Senior level Employment type

Employment type Full-time Job function

Industries Engineering Services and Semiconductor Manufacturing Referrals increase your chances of interviewing at UST Malaysia by 2x Get notified about new Field-Programmable Gate Arrays Engineer jobs in

Penang, Malaysia .

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We are looking for a dynamic, energetic Systems Validation Engineer to join our growing team. To work on the development of methodologies, the execution of system integration/System plans, and debugging of failures. As a key contributor you will collaborate with Architecture, Design, and Pre-silicon integration teams to improve post-silicon test content and provide feedback for future debug and test features. You will use and apply platform level tools and techniques to ensure Silicon quality. THE Person: As a Systems Validation Engineer, you will deliver our next generation of system validation tests for our products. In this high visibility position, your systems engineering expertise will be necessary to find and resolve silicon platform issues. KEY RESPONSIBILITIES: Work with global teams closely to define test strategy, work out smart system validation plan on post silicon level and fast response on issue debug. Collaborate with function teams and drive the work end to end from planning, execution, issue debug. Deliver professional project report to management, highlight risk in time with solution plans. Make improvements to system level integration/System level test strategies, methodologies, and processes. Collaboration with multi-functional hardware and software teams to debug and tackle complex issues. Develop and improve automation features according to requirements. PREFERRED EXPERIENCE: Strong PC technology background and familiar with x86 system, APU/CPU/GPU products, system features, power management, etc. Strong technical knowledge for variant type of System Level Validation (Unit level, Integrity Level and System Level) Excellent communication skills, demonstrated success in working across geographies and cross functional teams Familiar with Windows and Linux environment. Script or coding (Python, C, Perl, Ruby) capability is a strong plus, automation and validation farm experience is a strong plus. ACADEMIC CREDENTIALS: A B.Sc. Or Master’s Degree in Electrical/Computer Engineering. 3+ years’ experience of validation, debug in related industry. Self-motivated and able to work independently and effectively to meet time. Seniority level

Seniority level Mid-Senior level Employment type

Employment type Full-time Job function

Industries Engineering Services and IT Services and IT Consulting Referrals increase your chances of interviewing at UST Malaysia by 2x Get notified about new System Validation Engineer jobs in

Penang, Malaysia . Security Systems IP Validation Staff Engineer

Data Warehouse/Business Intelligence Developer

High Energy Efficiency Chip Verification Engineer

Associate III - Semiconductor Product Validation

Embedded Firmware Engineer (Zephyr RTOS)

Expression of Interest : Jobs for Computer Science, IT and Software Engineering Graduates

Graduate Technical Program (GTP) - Data Engineer

We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.

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WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance_

THE ROLE:

This position inside the AMD Strategic Silicon Solutions BU to work on the post silicon validation execution and issue debug. Seeking a candidate with semiconductor experience especially in Post Silicon validation.

THE PERSON:

This role demands extensive post silicon technical experience, problem-solving abilities, strong self-learning and good communication skills. You will work with team members to collaborate with customers, internal Silicon design, HW design team, SW team and other function team on new technology implement, test case development, execution and issue analysis.

KEY RESPONSIBILITIES:

• Work as a system validation engineer with potential grow to Project lead.
• Work with SOC/IP architects, IPSE, and SW/FW teams to develop the test case and IP System level test plan for S3 products.
• Work closely with HW, SW, FW and system engineering teams on post-silicon validation /debug till production.
• Participate in test case and test plan improvement, and new test case definition.
• Work closely with team members to ensure system level test results delivery meets requirements.

PREFERRED EXPERIENCE:

• ASIC post silicon experience including product & system validation, characterization, or board design
• Working knowledge/experience with post silicon validation.
• Strong technical knowledge for variant types of System Level Validation (Unit level, Integrity Level and System Level)
• Strong and clear communication skills
• Server product knowledge and hands-on experience is good a plus.
• Strong analytical/problem solving skills and pronounced attention to details.
• Self-motivated team player, and able to independently drive tasks to completion.

ACADEMIC CREDENTIALS:

• Bachelors or M asters degree in electrical or computer engineering
• 5+ years of work experience preferred.

LOCATION:

Penang, Malaysia

#LI-CY

#LI-Hybrid

Benefits offered are described: AMD benefits at a glance .

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

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