What Jobs are available for Soc Engineer in Malaysia?
Showing 120 Soc Engineer jobs in Malaysia
SoC DFX Engineer Lead
George Town
AMD
Posted 16 days ago
Job Viewed
Job Description
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SoC DFX Engineer Lead
role at
AMD The Role
This lead plays a key role in SoC DFX execution. He/she will lead the DFX execution team to complete all DFX design, verification, STA sign-off and ATE pattern generation and verification tasks on schedule. Moreover, he/she is expected to provide strong technical support for SoC Architecture, Feint, PD and SoC DV teams to achieve each SoC design milestone. Key Responsibilities
Participate in SoC DFX Architecture and ATE test plan development Lead SoC DFX execution team to finish DFX RTL integration, Scan insertion/ATPG, MBIST insertion, DFX Timing sign-off, DFX Verification and Emulation Lead DFX quality check and DFX checklist/document maintenance Lead ATE pattern generation/verification and bring up support Support test engineer and product engineer to do test time reduction and continuous yield improvement Preferred Experience
10 years SOC DFX experience on large scale SOCs More than 3 large scale SoC end-to-end (from DFT plan to mass production) DFT implementation experience Expert in Design for Test methodologies with rich project experience Strong logic Design and verification background with experience in STA Familiar with Siemens or Synopsys DFT flow Experience on GPU SOC DFT is a strong plus Good verbal and written communication skill in English and Mandarin Good teamwork spirit and self-driven Academic Credentials
Bachelor's or Master's degree in computer science/Electrical Engineering. Location
Penang, Malaysia Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Seniority level
Mid-Senior level Employment type
Full-time Job function
Industries: Semiconductor Manufacturing Referrals increase your chances of interviewing at AMD by 2x Get notified about new Lead Engineer jobs in Georgetown, Penang, Malaysia.
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SoC DFX Engineer Lead
role at
AMD The Role
This lead plays a key role in SoC DFX execution. He/she will lead the DFX execution team to complete all DFX design, verification, STA sign-off and ATE pattern generation and verification tasks on schedule. Moreover, he/she is expected to provide strong technical support for SoC Architecture, Feint, PD and SoC DV teams to achieve each SoC design milestone. Key Responsibilities
Participate in SoC DFX Architecture and ATE test plan development Lead SoC DFX execution team to finish DFX RTL integration, Scan insertion/ATPG, MBIST insertion, DFX Timing sign-off, DFX Verification and Emulation Lead DFX quality check and DFX checklist/document maintenance Lead ATE pattern generation/verification and bring up support Support test engineer and product engineer to do test time reduction and continuous yield improvement Preferred Experience
10 years SOC DFX experience on large scale SOCs More than 3 large scale SoC end-to-end (from DFT plan to mass production) DFT implementation experience Expert in Design for Test methodologies with rich project experience Strong logic Design and verification background with experience in STA Familiar with Siemens or Synopsys DFT flow Experience on GPU SOC DFT is a strong plus Good verbal and written communication skill in English and Mandarin Good teamwork spirit and self-driven Academic Credentials
Bachelor's or Master's degree in computer science/Electrical Engineering. Location
Penang, Malaysia Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Seniority level
Mid-Senior level Employment type
Full-time Job function
Industries: Semiconductor Manufacturing Referrals increase your chances of interviewing at AMD by 2x Get notified about new Lead Engineer jobs in Georgetown, Penang, Malaysia.
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0
Snr Analyst, Security Monitoring & Analysis
Kuala Lumpur, Kuala Lumpur
Sumitomo Mitsui Banking Corporation
Posted 1 day ago
Job Viewed
Job Description
Snr Analyst, Security Monitoring & Analysis Add expected salary to your profile for insights
To perform designated duties for Security Monitoring & Analysis services to meet SLA of SMBC branches/ subsidiaries.
Supports the operation and monitoring of the ISMS by maintaining documentation, assisting in risk assessments, tracking compliance, and helping the organization meet its information security objective.
Perform timely monitoring of system/application logs and trails.
Analyse abnormalities of system/application logs and trails.
Perform vulnerability scan, prepare reports and follow up on remediation with relevant IT departments.
Perform periodic review of IDs and applicable rules in network equipment, e.g. Switches, Firewall, and other devices.
Assist in developing, reviewing and executing information security policies, standards and procedures of SMBC branches/subsidiaries as well as regulations.
Ensure timely escalation to Team Lead, Deputy Head or Head of Department in case of any issues.
Perform other duties as assigned by the Head and Deputy Head of Department/Management from time to time.
Perform routine ISMS audits, gap analyses and compliance checks.
Track non-conformities, incidents and corrective actions.
Provide administrative and operational support for training and awareness programs.
Assist in preparing ISMS reports and metrics for management.
Job Requirements: 3-5 years in information security of IT with hands‑on experience with security monitoring tools.
Training (both technical and soft skills) will be provided for successful candidates who are eager to learn.
Possess strong communication skill.
Good communication and interpersonal skills.
Ability to effectively prioritize workload to meet tight deadlines and work objectives.
Proficiency with Microsoft applications e.g. Microsoft Word and Microsoft PowerPoint.
Interview Questions:
Which of the following statements best describes your right to work in Malaysia?
About Sumitomo Mitsui Banking Corporation (SMBC) SMBC operates globally with extensive overseas branches that offer a broad range of financial services. Due to its incorporation of a wholly owned subsidiary in Malaysia, SMBC is now inviting you to be part of its talent pool where you can grow with us. This is indeed a good opportunity for you to chart your career collaboratively with SMBC to greater heights.
#J-18808-Ljbffr
To perform designated duties for Security Monitoring & Analysis services to meet SLA of SMBC branches/ subsidiaries.
Supports the operation and monitoring of the ISMS by maintaining documentation, assisting in risk assessments, tracking compliance, and helping the organization meet its information security objective.
Perform timely monitoring of system/application logs and trails.
Analyse abnormalities of system/application logs and trails.
Perform vulnerability scan, prepare reports and follow up on remediation with relevant IT departments.
Perform periodic review of IDs and applicable rules in network equipment, e.g. Switches, Firewall, and other devices.
Assist in developing, reviewing and executing information security policies, standards and procedures of SMBC branches/subsidiaries as well as regulations.
Ensure timely escalation to Team Lead, Deputy Head or Head of Department in case of any issues.
Perform other duties as assigned by the Head and Deputy Head of Department/Management from time to time.
Perform routine ISMS audits, gap analyses and compliance checks.
Track non-conformities, incidents and corrective actions.
Provide administrative and operational support for training and awareness programs.
Assist in preparing ISMS reports and metrics for management.
Job Requirements: 3-5 years in information security of IT with hands‑on experience with security monitoring tools.
Training (both technical and soft skills) will be provided for successful candidates who are eager to learn.
Possess strong communication skill.
Good communication and interpersonal skills.
Ability to effectively prioritize workload to meet tight deadlines and work objectives.
Proficiency with Microsoft applications e.g. Microsoft Word and Microsoft PowerPoint.
Interview Questions:
Which of the following statements best describes your right to work in Malaysia?
About Sumitomo Mitsui Banking Corporation (SMBC) SMBC operates globally with extensive overseas branches that offer a broad range of financial services. Due to its incorporation of a wholly owned subsidiary in Malaysia, SMBC is now inviting you to be part of its talent pool where you can grow with us. This is indeed a good opportunity for you to chart your career collaboratively with SMBC to greater heights.
#J-18808-Ljbffr
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1
Snr Analyst, Security Monitoring & Analysis
Kuala Lumpur, Kuala Lumpur
SMBC SSC Sdn Bhd
Posted 3 days ago
Job Viewed
Job Description
Snr Analyst, Security Monitoring & Analysis
To perform designated duties for Security Monitoring & Analysis services to meet SLA of SMBC branches/ subsidiaries. Supports the operation and monitoring of the ISMS by maintaining documentation, assisting in risk assessments, tracking compliance, and helping the organization meet its information security objective. Perform timely monitoring of system/application logs and trails. Analyse abnormalities of system/application logs and trails. Perform vulnerability scan, prepare its reports and follow-up on remediation with relevant IT departments. Perform periodic review of IDs and applicable rules in network equipment, i.e. Switches, Firewall and etc. Assist in developing, reviewing and execution of information security policies, standard and procedures of SMBC branches/subsidiaries as well as regulations. Ensure timely escalation to Team Lead, Deputy Head or Head of Department in case of any issues. Perform other duties as assigned by the Head and Deputy Head of Department/Management from time to time. Perform routine ISMS audits, gap analyses, and compliance checks. Track non-conformities, incidents, and corrective actions. Provide administrative and operational support for training and awareness programs. Assist in preparing ISMS reports and metrics for management. Job Requirements:
3-5 year in information security of IT with Hands-on experience with security Monitoring tools. Training (both technical and soft skills) will be provided for successful candidates who are eager to learn. Possess strong communication skill. Good communication and interpersonal skills. Ability to effectively prioritize workload to meet tight deadlines and work objectives. Proficiency with Microsoft applications e.g. Microsoft Word and Microsoft PowerPoint.
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To perform designated duties for Security Monitoring & Analysis services to meet SLA of SMBC branches/ subsidiaries. Supports the operation and monitoring of the ISMS by maintaining documentation, assisting in risk assessments, tracking compliance, and helping the organization meet its information security objective. Perform timely monitoring of system/application logs and trails. Analyse abnormalities of system/application logs and trails. Perform vulnerability scan, prepare its reports and follow-up on remediation with relevant IT departments. Perform periodic review of IDs and applicable rules in network equipment, i.e. Switches, Firewall and etc. Assist in developing, reviewing and execution of information security policies, standard and procedures of SMBC branches/subsidiaries as well as regulations. Ensure timely escalation to Team Lead, Deputy Head or Head of Department in case of any issues. Perform other duties as assigned by the Head and Deputy Head of Department/Management from time to time. Perform routine ISMS audits, gap analyses, and compliance checks. Track non-conformities, incidents, and corrective actions. Provide administrative and operational support for training and awareness programs. Assist in preparing ISMS reports and metrics for management. Job Requirements:
3-5 year in information security of IT with Hands-on experience with security Monitoring tools. Training (both technical and soft skills) will be provided for successful candidates who are eager to learn. Possess strong communication skill. Good communication and interpersonal skills. Ability to effectively prioritize workload to meet tight deadlines and work objectives. Proficiency with Microsoft applications e.g. Microsoft Word and Microsoft PowerPoint.
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2
Senior SoC Integration/Signoff Engineer
Bayan Lepas
Altera
Posted 16 days ago
Job Viewed
Job Description
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Senior SoC Integration/Signoff Engineer
role at
Altera Overview
Senior SoC Integration/Signoff Engineer responsible for physical design, verification, and signoff across SoC and custom IPs, from RTL to GDSII, to create a manufacturable design database. Responsibilities
Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking Analyzes results and makes recommendations to fix violations for current and future product architecture Possesses design optimization knowledge to improve product-level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation Possesses hands on expertise in various process nodes full chip physical integration, system level place and route and system level verification signoff Qualifications
Education Requirements
Bachelor's degree in computer engineering, electronic Engineering or related field. Minimum Qualifications
5+ years of relevant experience in the following areas: Have multiple tape-out experience in deep submicron process nodes In depth, extensive knowledge and hands-on experience in physical design flow and relevant EDA tools In depth, extensive knowledge and hands-on experience in physical design signoff flow, such as STA flow, LEC flow, ERC flow and DRC flow Hands-on expertise with scripting languages such as Perl, TCL, Python and knowledge of hardware description languages of VHDL and Verilog Experience of mentoring junior team members and charting their development for success Possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment Preferred Requirements
Bachelor or master's degree in computer engineering, Electronic Engineering or related field 5+ years of experience in the following areas: Physical design involving multiple clock domains and clock, power management Low power design, tools and methodologies. Power intent UPF specifications Job Details
Job Type: Regular Shift: Shift 1 (Malaysia) Primary Location: Penang 15, Penang, Malaysia Other
Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Referrals increase your chances of interviewing at Altera by 2x. Get notified about new Senior Integration Engineer jobs in Bayan Lepas, Penang, Malaysia.
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Senior SoC Integration/Signoff Engineer
role at
Altera Overview
Senior SoC Integration/Signoff Engineer responsible for physical design, verification, and signoff across SoC and custom IPs, from RTL to GDSII, to create a manufacturable design database. Responsibilities
Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking Analyzes results and makes recommendations to fix violations for current and future product architecture Possesses design optimization knowledge to improve product-level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation Possesses hands on expertise in various process nodes full chip physical integration, system level place and route and system level verification signoff Qualifications
Education Requirements
Bachelor's degree in computer engineering, electronic Engineering or related field. Minimum Qualifications
5+ years of relevant experience in the following areas: Have multiple tape-out experience in deep submicron process nodes In depth, extensive knowledge and hands-on experience in physical design flow and relevant EDA tools In depth, extensive knowledge and hands-on experience in physical design signoff flow, such as STA flow, LEC flow, ERC flow and DRC flow Hands-on expertise with scripting languages such as Perl, TCL, Python and knowledge of hardware description languages of VHDL and Verilog Experience of mentoring junior team members and charting their development for success Possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment Preferred Requirements
Bachelor or master's degree in computer engineering, Electronic Engineering or related field 5+ years of experience in the following areas: Physical design involving multiple clock domains and clock, power management Low power design, tools and methodologies. Power intent UPF specifications Job Details
Job Type: Regular Shift: Shift 1 (Malaysia) Primary Location: Penang 15, Penang, Malaysia Other
Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Referrals increase your chances of interviewing at Altera by 2x. Get notified about new Senior Integration Engineer jobs in Bayan Lepas, Penang, Malaysia.
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3
Graduate Talent - SOC FCT Design Engineer
Bayan Lepas
Altera
Posted 16 days ago
Job Viewed
Job Description
Overview
Join to apply for the
Graduate Talent - SOC FCT Design Engineer
role at
Altera . Job posting details have been refined for clarity and compliance with formatting guidelines. Responsibilities
Involved in all aspects of static timing analysis (STA). Collaborate with Frontend, DFT and verification teams to understand design definition and requirements and provide feedback on timing and physical challenges. Responsible for timing closure and signoff of FPGA/SoC and Subsystem timing. Involved in static timing analysis, providing/deriving interface timing constraints to partitions and performing final timing signoff. Work closely with design and architecture teams for timing convergence analysis and with the physical design team for timing closure. Qualifications
BE/MS/PhD in Electronics/Electrical Engineering with keen interest in physical design, timing and physical integration. Strong communication, problem-solving, analytical skills and a proactive learning attitude. Job Details
Job Type: Contract Employee (Fixed Term) Shift: Shift 1 (Malaysia) Primary Location: Penang 15, Penang, Malaysia Additional Locations: Equity, Diversity and Inclusion
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Seniority level
Internship Employment type
Full-time Job function
Engineering and Information Technology Industries
Semiconductor Manufacturing Referrals increase your chances of interviewing at Altera by 2x Get notified about new System-on-Chip Design Engineer jobs in
Bayan Lepas, Penang, Malaysia .
#J-18808-Ljbffr
Join to apply for the
Graduate Talent - SOC FCT Design Engineer
role at
Altera . Job posting details have been refined for clarity and compliance with formatting guidelines. Responsibilities
Involved in all aspects of static timing analysis (STA). Collaborate with Frontend, DFT and verification teams to understand design definition and requirements and provide feedback on timing and physical challenges. Responsible for timing closure and signoff of FPGA/SoC and Subsystem timing. Involved in static timing analysis, providing/deriving interface timing constraints to partitions and performing final timing signoff. Work closely with design and architecture teams for timing convergence analysis and with the physical design team for timing closure. Qualifications
BE/MS/PhD in Electronics/Electrical Engineering with keen interest in physical design, timing and physical integration. Strong communication, problem-solving, analytical skills and a proactive learning attitude. Job Details
Job Type: Contract Employee (Fixed Term) Shift: Shift 1 (Malaysia) Primary Location: Penang 15, Penang, Malaysia Additional Locations: Equity, Diversity and Inclusion
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Seniority level
Internship Employment type
Full-time Job function
Engineering and Information Technology Industries
Semiconductor Manufacturing Referrals increase your chances of interviewing at Altera by 2x Get notified about new System-on-Chip Design Engineer jobs in
Bayan Lepas, Penang, Malaysia .
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4
Graduate Talent - SOC FCT Design Engineer
Kelantan, Kelantan
Altera
Posted 16 days ago
Job Viewed
Job Description
Altera
.Graduate Talent - SOC FCT Design Engineer page is loaded# Graduate Talent - SOC FCT Design Engineerlocations:
Penang 15, Penang, Malaysiatime type:
Full timeposted on:
Posted Todayjob requisition id:
R01187# **Job Details:**# # **Job Description:*** Successful candidate will be involved in all aspects of STA .* Candidate needs to work with Frontend, DFT and verification team to understand design definition and requirement and provide feedback on timing and physical challenges.* As a FPGA FC Timing design engineer candidate will be responsible for timing closure and signoff of FPGA/SoC and Subsystem timing.* Candidate will be involved in static timing analysis, providing/deriving interface timing constraints to partitions and doing final timing signoff.* Candidate will also work closely with design and architecture team for timing convergence analysis and will also work with physical design team for timing closure# # **Qualifications:*** BE/MS/Phd in Electronics/Electrical Engineering with keen interest in physical design, timing and physical integration.* Candidate should be strong in communication, problem solving, analytical skill and attitude to learn and perform.# # **Job Type:**Contract Employee (Fixed Term)# # **Shift:**Shift 1 (Malaysia)# # **Primary Location:**Penang 15, Penang, Malaysia# # **Additional Locations:**# # **Posting Statement:**All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. #J-18808-Ljbffr
.Graduate Talent - SOC FCT Design Engineer page is loaded# Graduate Talent - SOC FCT Design Engineerlocations:
Penang 15, Penang, Malaysiatime type:
Full timeposted on:
Posted Todayjob requisition id:
R01187# **Job Details:**# # **Job Description:*** Successful candidate will be involved in all aspects of STA .* Candidate needs to work with Frontend, DFT and verification team to understand design definition and requirement and provide feedback on timing and physical challenges.* As a FPGA FC Timing design engineer candidate will be responsible for timing closure and signoff of FPGA/SoC and Subsystem timing.* Candidate will be involved in static timing analysis, providing/deriving interface timing constraints to partitions and doing final timing signoff.* Candidate will also work closely with design and architecture team for timing convergence analysis and will also work with physical design team for timing closure# # **Qualifications:*** BE/MS/Phd in Electronics/Electrical Engineering with keen interest in physical design, timing and physical integration.* Candidate should be strong in communication, problem solving, analytical skill and attitude to learn and perform.# # **Job Type:**Contract Employee (Fixed Term)# # **Shift:**Shift 1 (Malaysia)# # **Primary Location:**Penang 15, Penang, Malaysia# # **Additional Locations:**# # **Posting Statement:**All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. #J-18808-Ljbffr
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5
SOC FCT Design Engineer - Graduate Talent (Start ASAP)
George Town
Prosple
Posted 4 days ago
Job Viewed
Job Description
Responsibilities
Here’s what you will be doing: Perform static timing analysis and provide/derive interface timing constraints to partitions Responsible for timing closure and signoff of FPGA/SoC and Subsystem timing Collaborate with Frontend, DFT, and verification teams to understand design definitions and provide feedback on timing and physical challenges Work closely with design and architecture teams for timing convergence analysis Coordinate with physical design team for timing closure Qualifications
The company is looking for: BE/MS/PhD in Electronics/Electrical Engineering with keen interest in physical design, timing, and physical integration Positive attitude to learn and perform Benefits
Contract Employee (Fixed Term) Shift 1 (Malaysia) Primary Location: Penang 15, Penang, Malaysia This job may close before the stated closing date, you are encouraged to apply as soon as possible
#J-18808-Ljbffr
Here’s what you will be doing: Perform static timing analysis and provide/derive interface timing constraints to partitions Responsible for timing closure and signoff of FPGA/SoC and Subsystem timing Collaborate with Frontend, DFT, and verification teams to understand design definitions and provide feedback on timing and physical challenges Work closely with design and architecture teams for timing convergence analysis Coordinate with physical design team for timing closure Qualifications
The company is looking for: BE/MS/PhD in Electronics/Electrical Engineering with keen interest in physical design, timing, and physical integration Positive attitude to learn and perform Benefits
Contract Employee (Fixed Term) Shift 1 (Malaysia) Primary Location: Penang 15, Penang, Malaysia This job may close before the stated closing date, you are encouraged to apply as soon as possible
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6
Graduate Talent (EDA Tools SoC Design/Automation Engineer)
George Town
Intel Corporation
Posted 8 days ago
Job Viewed
Job Description
Overview
Graduate Talent (EDA Tools SoC Design/Automation Engineer) role at
Intel Corporation . Join to apply for the
Graduate Talent (EDA Tools SoC Design/Automation Engineer)
role at
Intel Corporation . Job Details
Come join Intel's Product Enablement Solutions Group as a Graduate Talent (EDA Tools SoC Design/Automation Engineer). In this role you will be shaping the future of computing by developing new and creative methods to increase efficiency and reduce time to market for complex microprocessor and SoC designs. You will combine knowledge of logic and circuit design with software development techniques to deliver cutting edge solutions and collaborate with top engineering talent. Your Responsibilities
Deploying software tools to the design team, creating and delivering effective documentation and training, and providing support. Support and maintenance of design environment infrastructure components. Automating design tasks to complete the product design in the most efficient fashion possible. Developing solutions to problems utilizing formal education and judgment. Qualifications
Minimum Qualifications
You should have Bachelor/Master in Electrical or Electronic Engineering, Computer Engineering, Computer Science. Proficient in TCL, Perl or Python programming language. Unix/Linux knowledge Additional Qualifications
Ability to work in a fast-paced, collaborative, and often intense project schedule. Excellent communication and interpersonal skills, a good team-player as well as able to work independently. Creative mind and self-motivated. Analytical problem solving and multitasking. Able to do pathfinding or research independently to find solutions. Computer architecture Digital logic VLSI layout Job Type
Intel Contract Employee Shift
Shift 1 (Malaysia) Location
Primary Location: Malaysia, Penang Additional Locations
Business Group: The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences. Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change. Seniority level
Internship Employment type
Full-time Job function
Research, Analyst, and Information Technology Industries: Semiconductor Manufacturing Referrals increase your chances of interviewing at Intel Corporation by 2x
Get notified about new Graduate jobs in
Taman Pulau Pinang, Penang, Malaysia . (Fresh Grad Only) Engineer, Automation Development Engineering Software Engineer, Platform - Penang, Malaysia Expression of Interest : Jobs for Computer Science, IT and Software Engineering Graduate Talent (Software Development Test Engineer) Expression of Interest: Internship - Computer Science/IT/ Software Engineering Senior Engineer, Software Development Engineering Butterworth, Penang, Malaysia 8 hours ago
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Graduate Talent (EDA Tools SoC Design/Automation Engineer) role at
Intel Corporation . Join to apply for the
Graduate Talent (EDA Tools SoC Design/Automation Engineer)
role at
Intel Corporation . Job Details
Come join Intel's Product Enablement Solutions Group as a Graduate Talent (EDA Tools SoC Design/Automation Engineer). In this role you will be shaping the future of computing by developing new and creative methods to increase efficiency and reduce time to market for complex microprocessor and SoC designs. You will combine knowledge of logic and circuit design with software development techniques to deliver cutting edge solutions and collaborate with top engineering talent. Your Responsibilities
Deploying software tools to the design team, creating and delivering effective documentation and training, and providing support. Support and maintenance of design environment infrastructure components. Automating design tasks to complete the product design in the most efficient fashion possible. Developing solutions to problems utilizing formal education and judgment. Qualifications
Minimum Qualifications
You should have Bachelor/Master in Electrical or Electronic Engineering, Computer Engineering, Computer Science. Proficient in TCL, Perl or Python programming language. Unix/Linux knowledge Additional Qualifications
Ability to work in a fast-paced, collaborative, and often intense project schedule. Excellent communication and interpersonal skills, a good team-player as well as able to work independently. Creative mind and self-motivated. Analytical problem solving and multitasking. Able to do pathfinding or research independently to find solutions. Computer architecture Digital logic VLSI layout Job Type
Intel Contract Employee Shift
Shift 1 (Malaysia) Location
Primary Location: Malaysia, Penang Additional Locations
Business Group: The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences. Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change. Seniority level
Internship Employment type
Full-time Job function
Research, Analyst, and Information Technology Industries: Semiconductor Manufacturing Referrals increase your chances of interviewing at Intel Corporation by 2x
Get notified about new Graduate jobs in
Taman Pulau Pinang, Penang, Malaysia . (Fresh Grad Only) Engineer, Automation Development Engineering Software Engineer, Platform - Penang, Malaysia Expression of Interest : Jobs for Computer Science, IT and Software Engineering Graduate Talent (Software Development Test Engineer) Expression of Interest: Internship - Computer Science/IT/ Software Engineering Senior Engineer, Software Development Engineering Butterworth, Penang, Malaysia 8 hours ago
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7
Security Engineer (SOC L2/L3 – Chronicle SIEM & SOAR)
Kuala Lumpur, Kuala Lumpur
Accenture Southeast Asia
Posted 16 days ago
Job Viewed
Job Description
Overview
Security Engineer (SOC L2/L3 – Chronicle SIEM & SOAR) Responsibilities
Apply security expertise to design, build, and protect enterprise systems, applications, and processes Provide SOC Level 2 and Level 3 support, ensuring timely detection, response, and remediation of security threats Automate SOC monitoring and incident response processes Build and manage SOAR playbooks to streamline investigations Create, fine-tune, and optimize detection rules for advanced threat coverage Integrate SOC tools with third-party systems (ticketing platforms, threat intelligence feeds, EDR, firewalls, cloud-native logs) Develop custom workflows using Chronicle SOAR APIs to enhance operational efficiency Contribute as a subject matter expert in security operations and automation initiatives Actively engage in team discussions, share insights, and propose innovative solutions to security challenges Key Responsibilities
Apply security expertise to design, build, and protect enterprise systems, applications, and processes Provide SOC Level 2 and Level 3 support, ensuring timely detection, response, and remediation of security threats Automate SOC monitoring and incident response processes Build and manage SOAR playbooks to streamline investigations Create, fine-tune, and optimize detection rules for advanced threat coverage Integrate SOC tools with third-party systems (ticketing platforms, threat intelligence feeds, EDR, firewalls, cloud-native logs) Develop custom workflows using Chronicle SOAR APIs to enhance operational efficiency Contribute as a subject matter expert in security operations and automation initiatives Actively engage in team discussions, share insights, and propose innovative solutions to security challenges Key Requirements
Minimum of 3–6 years of experience in SOC environments with exposure to L2/L3 responsibilities Hands-on expertise in detection engineering, incident response, and automation Relevant certifications (e.g., GIAC, GCIH, GCDA, Chronicle, CISSP) are a plus Advanced proficiency in Security Operations Monitoring and Consulting Intermediate proficiency in Python programming for automation and scripting Experience with Chronicle SIEM & SOAR, including playbooks, detection rules, and workflow automation Familiarity with security tools and frameworks such as MITRE ATT&CK, VirusTotal, MISP, Abuse.ch Beginner proficiency in Accenture MxDR Ops Security Engineering and Front-End Programming (an advantage) Strong problem-solving and analytical skills with the ability to operate independently
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Security Engineer (SOC L2/L3 – Chronicle SIEM & SOAR) Responsibilities
Apply security expertise to design, build, and protect enterprise systems, applications, and processes Provide SOC Level 2 and Level 3 support, ensuring timely detection, response, and remediation of security threats Automate SOC monitoring and incident response processes Build and manage SOAR playbooks to streamline investigations Create, fine-tune, and optimize detection rules for advanced threat coverage Integrate SOC tools with third-party systems (ticketing platforms, threat intelligence feeds, EDR, firewalls, cloud-native logs) Develop custom workflows using Chronicle SOAR APIs to enhance operational efficiency Contribute as a subject matter expert in security operations and automation initiatives Actively engage in team discussions, share insights, and propose innovative solutions to security challenges Key Responsibilities
Apply security expertise to design, build, and protect enterprise systems, applications, and processes Provide SOC Level 2 and Level 3 support, ensuring timely detection, response, and remediation of security threats Automate SOC monitoring and incident response processes Build and manage SOAR playbooks to streamline investigations Create, fine-tune, and optimize detection rules for advanced threat coverage Integrate SOC tools with third-party systems (ticketing platforms, threat intelligence feeds, EDR, firewalls, cloud-native logs) Develop custom workflows using Chronicle SOAR APIs to enhance operational efficiency Contribute as a subject matter expert in security operations and automation initiatives Actively engage in team discussions, share insights, and propose innovative solutions to security challenges Key Requirements
Minimum of 3–6 years of experience in SOC environments with exposure to L2/L3 responsibilities Hands-on expertise in detection engineering, incident response, and automation Relevant certifications (e.g., GIAC, GCIH, GCDA, Chronicle, CISSP) are a plus Advanced proficiency in Security Operations Monitoring and Consulting Intermediate proficiency in Python programming for automation and scripting Experience with Chronicle SIEM & SOAR, including playbooks, detection rules, and workflow automation Familiarity with security tools and frameworks such as MITRE ATT&CK, VirusTotal, MISP, Abuse.ch Beginner proficiency in Accenture MxDR Ops Security Engineering and Front-End Programming (an advantage) Strong problem-solving and analytical skills with the ability to operate independently
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Graduate Talent (EDA Tools SoC Design/Automation Engineer)
George Town
Intel Corporation
Posted 16 days ago
Job Viewed
Job Description
# **Welcome!**# .Graduate Talent (EDA Tools SoC Design/Automation Engineer) page is loaded# Graduate Talent (EDA Tools SoC Design/Automation Engineer)locations:
Malaysia, Penangtime type:
Full timeposted on:
Posted Todayjob requisition id:
JR # **Job Details:**# Job Description:Come join Intel's Product Enablement Solutions Group as a Graduate Talent (EDA Tools SoC Design/Automation Engineer).In this role you will be shaping the future of computing. We bring innovative technologies to the most complex microprocessor and SoC products on the planet. You will be working in a team developing new and creative methods to increase efficiency and reduce time to market for these designs, helping to increase Intel's lead in computing. You will combine knowledge of logic and circuit design with software development techniques to deliver cutting edge solutions, shaping the way these products come to life. You will work with the best engineering talent in the world to collaborate on these new methods. You will play a pivotal role in our mission to revolutionize computing.Your responsibilities will include but not be limited to:* Deploying software tools to the design team, creating and delivering effective documentation and training, and providing support.* Support and maintenance of design environment infrastructure components* Automating design tasks in order to complete the product design in the most efficient fashion possible.* Developing solutions to problems utilizing formal education and judgment.# **Qualifications:**Minimum Qualifications:* You should have Bachelor/Master in Electrical or Electronic Engineering, Computer Engineering, Computer Science.* Proficient in TCL, Perl or Python programming language.* Unix/Linux knowledgeAdditional Qualifications:* Ability to work in a fast-paced, collaborative, and often intense project schedule.* Excellent communication and interpersonal skills, a good team-player as well as able to work independently.* Creative mind and self-motivated.* Analytical problem solving and multitasking.* Able to do pathfinding or research independently to find solutions.* Computer architecture* Digital logic* VLSI layout# Job Type:Intel Contract Employee# Shift:Shift 1 (Malaysia)# Primary Location:Malaysia, Penang# Additional Locations:# Business group:The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.# Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.# # Position of TrustN/A**Work Model for this Role**This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. #J-18808-Ljbffr
Malaysia, Penangtime type:
Full timeposted on:
Posted Todayjob requisition id:
JR # **Job Details:**# Job Description:Come join Intel's Product Enablement Solutions Group as a Graduate Talent (EDA Tools SoC Design/Automation Engineer).In this role you will be shaping the future of computing. We bring innovative technologies to the most complex microprocessor and SoC products on the planet. You will be working in a team developing new and creative methods to increase efficiency and reduce time to market for these designs, helping to increase Intel's lead in computing. You will combine knowledge of logic and circuit design with software development techniques to deliver cutting edge solutions, shaping the way these products come to life. You will work with the best engineering talent in the world to collaborate on these new methods. You will play a pivotal role in our mission to revolutionize computing.Your responsibilities will include but not be limited to:* Deploying software tools to the design team, creating and delivering effective documentation and training, and providing support.* Support and maintenance of design environment infrastructure components* Automating design tasks in order to complete the product design in the most efficient fashion possible.* Developing solutions to problems utilizing formal education and judgment.# **Qualifications:**Minimum Qualifications:* You should have Bachelor/Master in Electrical or Electronic Engineering, Computer Engineering, Computer Science.* Proficient in TCL, Perl or Python programming language.* Unix/Linux knowledgeAdditional Qualifications:* Ability to work in a fast-paced, collaborative, and often intense project schedule.* Excellent communication and interpersonal skills, a good team-player as well as able to work independently.* Creative mind and self-motivated.* Analytical problem solving and multitasking.* Able to do pathfinding or research independently to find solutions.* Computer architecture* Digital logic* VLSI layout# Job Type:Intel Contract Employee# Shift:Shift 1 (Malaysia)# Primary Location:Malaysia, Penang# Additional Locations:# Business group:The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.# Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.# # Position of TrustN/A**Work Model for this Role**This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. #J-18808-Ljbffr
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