2,964 Jobs in Butterworth

Overview

Join to apply for the US / European - Tax Manager / Senior / Director role at Catalyst Labs

General Interest

About Us: Catalyst Labs is a recruitment agency specializing in tax across North America, Caribbean, UK, Europe and in certain Asian jurisdictions such as HonKong, Singapore, South Korea and Taiwan. This is an open expression of interest for seasoned tax professionals looking to explore new opportunities. By submitting your CV, you will be considered for upcoming roles with our clients ranging from startups, fast-growing mid-sized businesses to investment entities, Big 4 and Large Corporates. We work directly with hiring partners who understand the value of strategic tax leadership and we take pride in facilitating conversations that are aligned with your expertise and long-term goals.

Who Can Apply: Anyone interested in Tax careers.

Location: Anywhere in the USA, Caribbean, UK, Crown dependencies, Europe or East Asia.

Experience: Trainee/entry-level to senior roles, from Senior Manager to Director and Partner.

General Requirements by Role:

• Proven experience in public accounting, corporate tax departments, or top law firms.
• Prior experience in a top tax firm or Big 4.
• Strong working knowledge of complex tax compliance, provision work or advisory services.
• Ideally specialized within one or two concentrations such as corporate, partnership, international, private client, M&A, digital assets, Transferee etc.
• Exposure to specialized areas such as SALT, transfer pricing, R&D tax credit, IRS controversy or FATCA is welcome.
• CPA qualification preferred; EA, MST/ LL.M in Tax are valued.
• Professionals with proven experience in Tax Technology are also welcome.
• Experience in managing and mentoring junior staff, as well as leading client-facing engagements.
• Familiarity with tax planning strategies, entity structuring, and M&A tax due diligence offshore structures is a strong plus.

Why Work with us?

• Take advantage of the strong relationships we have built with the Big 4.
• Tap instantly into our global network for both access and insight.
• Work with competent recruiters who are deeply embedded with clients.
• We prioritize your confidentiality and privacy throughout the recruitment process.
• No spamming.
• Support on crafting the perfect resume for jobs we shortlist you for.
• Bypass gatekeepers, work directly with hiring managers and decision makers.
• Industry insights and assistance in salary negotiations.

Note: We adhere to strict data protection policies to ensure that your information is secure and only shared with potential employers with your explicit consent.

• Seniority level: Not Applicable
• Employment type: Full-time
• Job function: Accounting/Auditing and Finance
• Industries: Business Consulting and Services

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Overview

Intel's Debug and Trace Solution Group is seeking a talented and enthusiastic Software Engineer to join our dynamic team. In this role, you will play a crucial part in leading the development of cutting-edge debug and tracing tools used across the entire Intel product roadmap. You will collaborate with design partners, debug engineers, and validation engineers to develop solutions that enhance performance and scalability. You will design and implement tools that accelerate debug throughput and contribute to optimizing Intel's development processes.

• Design, develop, and maintain scalable debug and tracing tools.
• Collaborate with cross-functional teams, including design partners, debug engineers, and validation engineers.
• Lead the implementation of solutions that enhance debug efficiency and productivity.
• Contribute to the overall development strategy and roadmap of Intel's debug tools.

• Bachelor of Science degree in Computer Science, Software Engineering or Computer Engineering
• Knowledge in C++, Python and OOP.
• Knowledge of CMake and Git source control would be an added advantage.
• Experience in HW debug tools would be an added advantage.
• Familiarity with CPU architecture would be an added advantage.
• Excellent collaboration and communication skills.

Job Type: College Grad

Shift: Shift 1 (Malaysia)

Primary Location: Malaysia, Penang

Additional Locations:

Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, ancestry, age, disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role: This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.

Company Description

At Western Digital, our vision is to power global innovation and push the boundaries of technology to make what you thought was once impossible, possible.

At our core, Western Digital is a company of problem solvers. People achieve extraordinary things given the right technology. For decades, we’ve been doing just that—our technology helped people put a man on the moon and capture the first-ever picture of a black hole.

We offer an expansive portfolio of technologies, HDDs, and platforms for business, creative professionals, and consumers alike under our Western Digital, WD, WD_BLACK, and SanDisk Professional brands.

We are a key partner to some of the largest and highest-growth organizations in the world. From enabling systems to make cities safer and more connected, to powering the data centers behind many of the world’s biggest companies and hyperscale cloud providers, to meeting the massive and ever-growing data storage needs of the AI era, Western Digital is fueling a brighter, smarter future.

Today’s exceptional challenges require your unique skills. Together, we can build the future of data storage.

• To plan, coordinate and follow-up sputter systems start-up / conversion activities and process documentation.
• To audit sputter parameters and practice periodically, include online SPC and procedure conformance.
• To lead sputter process related issues trouble shooting (common causes), work closely with shift process team in sputter process sustaining, trouble shooting & improvement in order to achieve sputter utilization (down time), yield & quality goal.
• To lead Sputter Process Improvement Projects (SU/STT/Cost/Quality/PPH & others), which include new products/machines/process qualification.
• To lead, supervise and coach/train process tech, include engineering specialist and characterize technicians.
• Responsible for sputter process related issues trouble shooting (common causes), work closely with Shift process team in sputter process sustaining, trouble shooting & improvement in order to achieve sputter utilization (down time) & quality goal.
• Responsible to lead, supervise and coach/train process tech, include engineering specialist and characterize technicians. Responsible to train and share PMR/DS sputter process and yield improvement knowledge with the team.
• Responsible for sputter parameters monitoring, include online SPC monitoring and procedure conformance.
• Responsible for sputter machine start-up include process characterize (new products & process changes).
• Responsible for new products/machines/process qualification.
• Responsible for sputter process improvement projects (SU/STT/Cost/Quality/PPH & others).

Others include FMEA.

• Understand and accept responsibility for performing jobs safely
• Follow safety and health rules
• Responsible to assist in sputter yield related issues trouble shooting (common causes).
• Work closely with Anelva yield team in sputter yield sustaining, trouble shooting & improvement in order to achieve sputter yield goal. This includes 0725 Operation Yield Improvement.
• Other supervisor assigned task
• Improve Media magnetic baseline: ACC% and to enable process stability and repeatability via recipe tuning and optimization.
• Responsible for new product qualifications.

Required:

• Bachelor Degree in Material Science and Engineering
• Minimum 1-3 years of working experience
• Fresh graduates are encourage to apply

Preferred :

• Vacuum Technology related studies or thesis is preferred

Skills :

• Ability English communication(spoken and written)

Western Digital thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.

Western Digital is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.

Notice To Candidates: Please be aware that Western Digital and its subsidiaries will never request payment as a condition for applying for a position or receiving an offer of employment. Should you encounter any such requests, please report it immediately to Western Digital Ethics Helpline or email

Join to apply for the Senior Software Engineer role at Motorola Solutions

2 weeks ago Be among the first 25 applicants

Join to apply for the Senior Software Engineer role at Motorola Solutions

At Motorola Solutions, we believe that everything starts with our people. We’re a global close-knit community, united by the relentless pursuit to help keep people safer everywhere. Our critical communications, video security and command center technologies support public safety agencies and enterprises alike, enabling the coordination that’s critical for safer communities, safer schools, safer hospitals and safer businesses. Connect with a career that matters, and help us build a safer future.

Join our innovative engineering team and make a real-world impact! As a Senior Software Engineer, you'll contribute to the development of our Public Safety multiplatform SDK, empowering first responders and others with cutting-edge mobile evidence solutions. Working with Kotlin and Swift, you'll design, develop, and maintain the Mobile Evidence SDK for both internal and external consumers, with a strong emphasis on creating a seamless and positive developer experience. Be a key player in building technology that matters.

• Collaborate closely with your team to develop, maintain and support core platforms and applications, as well as great technical documentation that is developer friendly
• Build quality in by integrating early, participate in code reviews and by ensuring high % of test coverage
• Proactively reduce technical debt by aggressively refactoring code
• Develop highly secure applications by following defense in depth principles
• Architect software systems across multiple technologies and platforms
• Ensure code is extensible and maintainable by following leading architectural principles and patterns
• Automate everything, contribute to tooling and manage CI/CD pipelines
• Actively monitor services, respond to incidents and contribute to post incident reviews
• Contribute to a continuous learning culture by participating in training & workshops, bringing ideas to the table and creating learning opportunities
• Help drive continuous improvement by actively identifying improvements, participating in retrospectives and contributing to key metrics
• Focus on customers by asking the right questions, solving the right problem and designing great experiences
• Explore various solutions and share findings with the team
• Help drive engineering best practices and initiatives

Bonus if you have:

• Tertiary level computer science or software engineering
• Certificates in software or cloud technologies
• Certificates in Agile

• Kotlin for Android
• Android standards and ecosystem (MAD Skills)
• Android SDK (e.g. writing efficient layouts, dealing with application lifecycle)
• Gradle build tooling
• Some Java and JVM knowledge
• Application of OOP concepts and design patterns
• Reactive programming paradigm
• Functional programming
• Good working knowledge of software architectures
• HTTP and RESTful designs
• Automated Unit, Integration, UI, snapshot and Performance testing
• Managing certificates and provisioning profiles
• CI/CD pipelines & Configuration Management
• Git and associated tools, platforms and practices
• OpenAPI and/or Swagger
• Agile methodologies (Scrum, Kanban)

Bonus if you have experience with:

• Jetpack Compose and Compose Multiplatform
• Kotlin Multiplatform
• iOS development with Swift, with SwiftUI or UIKit
• Flutter, React Native
• Cloud platforms such as AWS, GCP and Azure
• Databases including NoSQL
• TDD, BDD, ATDD

• 1-2+ years Mobile Development
• 1+ years Android with Kotlin
• Worked in an Agile environment

• Ability to work well and collaboratively in an Agile environment
• Open to failure, to ask questions and grow and learn from mistakes
• Ability to research, POC and learn new technologies rapidly
• Creative, with the ability to generate and evaluate multiple solutions
• Pragmatic, understanding the impact of new technology
• Ability to evaluate and mitigate risks

None

None

Experienced

Yes

EEO Statement: Motorola Solutions is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion or belief, sex, sexual orientation, gender identity, national origin, disability, veteran status or any other legally-protected characteristic.

We are proud of our people-first and community-focused culture, empowering every Motorolan to be their most authentic self and to do their best work to deliver on the promise of a safer world. If you’d like to join our team but feel that you don’t quite meet all of the preferred skills, we’d still love to hear why you think you’d be a great addition to our team.

Overview

We are building advanced burn-in systems for high-performance chips like SoCs, GPUs, and AI accelerators. These systems involve multi-rail DPS, high-channel vector I/O, and complex temperature control.

You will be responsible for embedded firmware development, board-level control, sensor integration, and communication with the main host system.

• Develop embedded firmware to control DPS modules, ADCs, sensors, and actuators
• Implement I²C/SPI/UART interfaces for board-level communication
• Integrate temperature control loops, fan/heater regulation, and protection logic
• Work closely with hardware team for bring-up and system debug
• Interface with host PC (via USB, Ethernet, or CAN) for configuration and data logging
• Write clean, maintainable code with version control and documentation
• Support board-level diagnostics, reliability logging, and calibration features

• 5+ years in embedded firmware development (C/C++ on MCU/RTOS platforms)
• Hands-on with STM32, NXP, Microchip, or TI microcontrollers
• Experience with I²C, SPI, UART protocols and real-time control applications
• Familiar with thermal control, sensor feedback systems, and power sequencing
• Knowledge of Git, structured testing, and firmware debugging tools
• Background in ATE, BMS, industrial control, or instrumentation is a strong plus
• Experience in LabVIEW or Python for host-PC communication is a bonus

• Mid-Senior level

• Full-time

• Design and Product Management

• Industrial Machinery Manufacturing

Overview

Direct message the job poster from Alchip Technologies

Perform gate level netlist to GDS design independently including but not limited to floor planning, place & route, close tree synthesis, timing sign off and physical verification. Perform design IP implementation, IR drop analysis, DFT, STA and foundry merge. Work with manager to achieve assigned tape out target.

• Bachelor or MS Degree in EE or related.
• Solid knowledge on digital/analog electrical; knowledge on verilog/ synthesis/ floorplan will be a plus.
• Experience of working on top level design with chip level floor plan is a plus.
• Familiar with Cadence EDI, Synopsys ICC design flow and Mentor Calibre for physical design engineer.
• Familiar with TCL/ Perl scripting and design automation.

• Entry level

• Full-time

• Industries

• Semiconductor Manufacturing

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(Fresh Grads Only) Engineer, Failure Analysis Engineering

Georgetown, Penang, Malaysia 22 hours ago

Expression of Interest : Jobs for Electrical & Electronic Engineer Graduates

Field Applications Engineer (Penang, Malaysia)

We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.

Overview

2 days ago Be among the first 25 applicants

• Management of product sustaining activities which include driving product performance improvement (yield, test time, quality, etc.) and cost reduction.
• Manage the introduction of new products (NPI) and their ramp to volume manufacturing.
• Work with the Manufacturing, Design, Quality, and Failure Analysis teams in the disposition of product excursions and manage cases through a material review board.
• Manage the engineering activities during new product introduction including product test flow, EVT and DVT engineering activities, generation of buyoff units, and test program readiness before ramping to volume manufacturing.
• Manage product ramp to yield entitlement. Drive all margin issues with operations and development teams.
• Maintaining good networking with counterpart in China.
• Other duties as assigned by Manager.

• Bachelor’s degree in Electrical and Electronic Engineering/Computer Engineering or above.
• Fluent oral and written skills in Mandarin & English.
• At least 5 years or above of related working experience in related fields with sound knowledge of semiconductor digital device testing concepts, semiconductor device fabrication & manufacturing processes.
• Product definition, yield analysis, wafer process and semiconductor knowledge, ATE/SLT testing methodology, project management.
• Capable of working with cross functional teams like test & product development team, manufacturing, product planner, quality and failure analysis.

• Executive

• Full-time

• Semiconductor Manufacturing

Overview

Part of the global PCIe/CXL Center of Excellence (CoE) team, developing the latest & state of the art PCIe/CXL solution for next generation FPGA in the latest process technology node.

• Develops logic/RTL design and simulation for IP/SoC design & integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design.
• Participates in the definition of PCIe/CXL architecture and microarchitecture features of the block being designed. Works with IP providers to integrate and validate IPs at the SoC level.
• Power lead for PCIe subsystem, working with various PD owners on timing convergence for PCIe subsystem.
• Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
• Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
• Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence. Drives quality assurance compliance for smooth IP/SoC handoff.

• Bachelor’s Degree in electrical/computer engineering or related field and 7+ years of experience. Or a Master’s Degree in electrical/computer engineering or related field and 6+ years of experience.
• Experience in micro-architecture (clocking, reset, power, etc) definition & debug. Good knowledge of PCIe/CXL or high-speed serial interface protocol, such as USB or Ethernet.
• 5+ years of RTL coding and/or IP integration experience into SoC design. Experience in design related tools such as LINT, CDC, PT-STA, Fishtail, Power UPF etc & design concepts such as data flow, algorithm state machines, and timing charts. Knowledge on FPGA background would be a plus.
• Highly motivated individual, team player with good communication skill.

Job Type: Regular

Shift: Shift 1 (Malaysia)

Primary Location: Penang

Additional Locations:

Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Seniority level: Mid-Senior level

Employment type: Full-time

Job function: Engineering and Information Technology

Industries: Semiconductor Manufacturing

Georgetown, Penang, Malaysia 22 hours ago

Overview

Join to apply for the Staff DFT Design Engineer role at Altera .

• Develops the logic design, register transfer level (RTL) coding, simulation, DFT quality checks and timing closure. Owns the test content generation and delivery to manufacturing for various DFx content (including SCAN, MBIST, or any Custom DFT solution)
• Participates and collaborates in the definition of architecture and microarchitecture features of the block, subsystem, and SoC under DFT being designed (including TAP, SCAN, MBIST, BSCAN, process monitoring, in system test/BIST, Custom DFT, DFD)
• Applies various strategies, tools, and methods to write and generate RTL and structural code to integrate DFT
• Optimizes logic to qualify the design to meet power, performance, area, timing, test-coverage, DPM, and test-time/vector-memory reduction goals as well as design integrity for physical implementation
• Reviews the verification plan and drives verification of the DFT design to achieve desired architecture and microarchitecture specifications
• Ensures design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features
• Integrates DFT blocks into functional IP and SoC and supports SoC customers to ensure high-quality integration of the IP block
• Collaborates with post-silicon and manufacturing team to verify the feature on silicon, support debug requirements, and document all learnings and improvements requirement in design and validation
• Drives high test coverage through structural and specific IP tests to achieve the quality and DPM objectives of the product and develops HVM content for rapid bring up and production on the ATE

• Minimum Qualifications
• Bachelor or Master in Electrical/Electronics/Computer Engineering or related field
• Good understanding of the ASIC design flow as well as the DFT and Manufacturing requirements
• Skilled in DFT design and Integration, various validation techniques and industry standard methodologies - IJTAG, MBIST, LBIST, SCAN, etc.
• Proficiency in scripting languages such as TCL/TK/PERL/Python
• Experienced on IEEE standards such as 1149.1 JTAG and 1687 IJTAG is preferred
• Knowledge and hands-on experiences on FPGA design or application is a plus

In depth understanding of the latest DFT industry best technology, tools and methodology, and have experienced to innovatively adapt those technology to specific product needs.

Regular

Shift 1 (Malaysia)

Penang 15, Penang, Malaysia

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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